Biography

Shubhakar Kalya obtained his Master’s degree in Microelectronics from Indian Institute of Science (IISc), Bangalore, India in 2007 and PhD degree from Nanyang Technological University (NTU), Singapore in 2012/13. During his doctoral studies at NTU, he worked on Nanoscale characterization of High-κ gate dielectrics for reliability and failure analysis. He has also worked as a researcher at Institute of Materials and Research Engineering (IMRE), Singapore from July-2009 to Dec-2012, and involved in research related to characterization of High-κ gate dielectrics using scanning tunneling microscopy and atomic force microscopy.  His research interests are in nanoscale characterization and analysis of High-κ gate dielectrics for logic and memory devices, and failure analysis of nanoscale electronic devices. He was a Visiting Scientist at Massachusetts Institute of Technology (MIT), Cambridge, USA in Electrical Engineering and Computer Science (EECS) Department during Jan-June 2017. Currently, he is working as a Lecturer at Singapore University of Technology (SUTD), Singapore.

Education

• PhD, Electrical & Electronics Engineering, Nanyang Technological University, Singapore
• M.E (Microelectronics), Electrical Engineering, Indian Institute of Science, Bangalore, India
• B. E (Electronics and Communication Engineering), NMAMIT, Nitte, India

Research Interests

• High-K dielectrics for advanced  logic and memory devices
• Reliability and failure analysis of  nanoscale electronic devices
• Nanoscale characterization of dielectrics and devices.

Key Publications

• K. Shubhakar, et al., “An SEM/STM based nanoprobing and TEM study of breakdown locations in HfO₂/SiO_x dielectric stacks for failure analysis”, Microelectronics Reliability, Vol. 55, pp. 1450-1455 (2015) (European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Toulouse, France, Oct-2015).
• Alok. R , K. Shubhakar, et al., “Localized random telegraphic noise study in HfO₂ dielectric stacks using scanning tunneling microscopy- Analysis of process and stress-induced traps”, 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Taiwan, 2015,  pp. 458-462.
• K. Shubhakar, K.L. Pey, et al., “Impact of local structural and electrical properties of grain boundaries in polycrystalline HfO₂ on reliability of SiO_x interfacial layer”, Microelectronic Reliability, Vol. 54, pp. 1712-1717 (2014) (European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Berlin, Germany, Oct-2014).
• K. Shubhakar, K.L. Pey, et al., “Leakage current and structural analysis of annealed HfO₂/La₂O₃ and CeO₂/La₂O₃ dielectric stacks: A nanoscopic study”, Journal of Vacuum Science & Technology B, 03D125-1, Vol. 32(3) 2014.
• K. Shubhakar, N. Raghavan and K.L. Pey, “Nanoscopic study of HfO₂ based HK dielectric stacks and its failure analysis”, (Invited Paper) International Journal of Materials Science and Engineering Vol. 2, pp. 81-86 (2014).
• K. Shubhakar, K.L. Pey, et al., “Study of preferential localized degradation and breakdown of HfO₂/SiO_x dielectric stacks at grain boundary sites of polycrystalline HfO₂ dielectrics”, Microelectronic Engineering, Vol. 109, pp. 364-369 (2013) (18th Conference of Insulating Films on Semiconductors (INFOS), Cracow, Poland, July- 2013).
• K. Shubhakar, K.L. Pey, et al., “Nanoscale physical analysis of localized breakdown events in HfO₂/SiO_x dielectric stacks: A correlation study of STM induced BD with C-AFM and TEM”, IEEE- International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore, pp.1-7 (2012).
• Raghavan, K.L. Pey, K. Shubhakar and M. Bosman, “Modified percolation model for polycrystalline high-κ gate stack with grain boundary defects”, IEEE Electron Device Letters, Vol. 32, pp.78-80 (2011).
• K. Shubhakar, K.L. Pey, et al., “Nanoscale electrical and physical study of polycrystalline high-κ dielectrics and proposed reliability enhancement techniques”, IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, pp.786-791 (2011).
• K. Shubhakar, K.L. Pey, et al., “Grain boundary assisted degradation and breakdown study in cerium oxide gate dielectric using scanning tunneling microscopy’’, Applied Physics Letters, Vol. 98, 072902 (2011).
• K. Shubhakar, K.L. Pey, et al., “Localized degradation and breakdown study of cerium-oxide high-κ gate dielectric material using scanning tunneling microscopy”, IEEE- International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore, pp. 1-5 (2010).

Invited Talks

• 5th Global Nanotechnology Congress and Expo-2018, Valencia, Spain, Dec 03-05, 2018.
• 4th Annual World Congress of Advanced Materials-2015 (WCAM-2015), Chongqing, China, May 27-29, 2015.
• 2nd International Conference on Nano and Materials Engineering (ICNME-2014), Dubai, UAE, April 2-3, 2014.
• International Workshop on Biomedical Signal Processing and Instrumentation, NMAMIT Nitte, India, March 6-7, 2014.
• The IEEE-International Conference on Smart Structures and Systems (ISSS-2013), Chennai, India, March 28-29, 2013.